1. Field of the Invention
The present invention relates to single sided, double sided and multi-layer circuit boards wherein conductive holes are formed through the board for electrical connection between elements at different levels of the board.
2. Description of the Prior Art
In recent years, circuit board technology has become more sophisticated, with greater emphasis on closer spacing of the circuit elements on the board. When circuit elements are placed on both sides of the board or at different levels of the board, it is usually necessary to make a large number of "through hole" connections from one side of the board to the other. In a mass production operation, this must be done in a manner that is compatible with the manufacturing techniques for making the circuit boards, and in a manner that the through hole connections are made reliably.
For a high production operation, it has generally been found impractical to form a through hole connection by physically inserting a conductive element in a hole and then connecting the element to two circuit elements by soldering or other means. Therefore, plating techniques have been used in the prior art to make such connections. The usual method of accomplishing this is to plate the circuit elements and the through hole connections simultaneously so that the through hole connection is essentially made as an integral part of circuit elements on different levels of the board.
One method of accomplishing this in the prior art is by means of an "additive process", in which a dielectric substrate is selected with a porous surface which readily accepts deposition of a conductive material by an electroless process. Prior to placing any conductive material on the substrate, holes are drilled through the substrate in the appropriate locations, and the entire surface of the substrate, including the walls of the drilled holes, is sensitized, this being usually accomplished by dipping the substrate in a sensitizing solution. Next, a resist material is applied to both surfaces of the substrate, in a manner to leave exposed the surface areas of both sides of the substrate which are to be formed with conductive elements. Then the substrate is dipped into an electroless plating solution, until sufficient conductive material (e.g. copper) is deposited on the exposed sensitized areas of the board to form the circuit elements and the related through hole connections as continuous plated material.
Another prior art method of forming the circuit elements and the through hole connections together is by an electrolytic plating process. As in the additive process, a special dielectric substrate is provided that is adapted to receive an electroless coating of conductive material. The substrate is drilled with holes in the appropriate locations, and the entire substrate surface, including the walls of the drilled holes, is sensitized. Then the entire surface of the board is electrolessly plated (including the walls of the holes) with a very thin conductive coating (e.g. 30 millionths inch thick). Next, a protective coating is placed on the two surfaces of the substrate, in accordance with the pattern of the circuit elements to be formed, with the surface portions of the substrate on which circuit elements are to be formed being exposed. After this, a conductive material is electrolytically plated on the exposed portions of the substrate, so as to form circuit elements connected integrally with through hole plating material to make the through hole connection. Subsequently, the resist material is stripped away from the board substrate, and the board is then subjected to an etching solution for a short period, just sufficient to remove the very thin electrolessly plated areas that had been protected by the resist. This general process is described in U.S. Pat. No. 3,568,312, Perricone.
In the processes described above, it is necessary to apply the protective coating (i.e., resist) in accordance with a predetermined pattern so that certain surface areas on the substrate are exposed as well as the surface areas of the hole walls. Thus, either all of the circuit elements or a portion of the circuit elements on the two surfaces of the board are also formed by the plating process. Since the conductive material that is deposited either electrolessly or electrolytically is more expensive per unit weight of material than conductive material formed from a foil sheet on the substrate (either by an etching technique or by die stamping), it is desirable to accomplish the reliable plating of conductive through holes in a manner to minimize the necessity of forming circuit elements on the surface of the board by the plating technique.
Generally representative of the prior art in this area are the following U.S. Pat. Nos.: Coe et al, 3,261,769; McNutt, 3,268,653; Nagy et al, 3,357,099; Hirohata et al, 3,391,455; Freehauf et al, 3,429,036; Johnson, 3,457,638; Hirohata et al, 3,506,482; Grunwald et al, 3,620,933; and Stahl et al, 3,625,758.